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  • Optimizing Cadence Tensilica Processors for your application
    YouTube Video
    Optimizing Cadence Tensilica Processors for your application
    Cadence® Tensilica® processors allow designers achieve a new level of optimization for any application. Select from a wide range of predefined functions, add ...
  • Need to Offload Your Apps Processor? See How Customizable Processors Can Help
    YouTube Video
    Need to Offload Your Apps Processor? See How Customizable Processors Can Help
    Here's a fun and fast way to understand how Cadence® Tensilica® Xtensa® processors work, and how you can easily use them to offload your applications ...
  • Cadence Demonstration of Customized Tensilica Processors for Microsoft HoloLens HPU
    YouTube Video
    Cadence Demonstration of Customized Tensilica Processors for Microsoft HoloLens HPU
    For more information about embedded vision, including hundreds of additional videos, please visit http://www.embedded-vision.com. Neil Robinson, Segment ...
  • AUTOSAR-Compliant TOPPERS Automotive Kernel on Tensilica DSP Processors
    YouTube Video
    AUTOSAR-Compliant TOPPERS Automotive Kernel on Tensilica DSP Processors
    Nagoya University collaborated with Cadence to port the AUTOSAR-compliant TOPPERS ATK2-SC1 (Toyohashi OPen Platform for Embedded Real-time ...
  • Whiteboard Wednesdays - SSD Controllers with Tensilica Processors
    YouTube Video
    Whiteboard Wednesdays - SSD Controllers with Tensilica Processors
    In this week's Whiteboard Wednesday, Neil Robinson follows up on last week's “SSD Controller Basics and Trends” video to show how optimizing Tensilica ...
  • Saving Time and Money with Configurable Processor in Joint CPU and DSP Development Environment
    YouTube Video
    Saving Time and Money with Configurable Processor in Joint CPU and DSP Development Environment
    In developing customized ASICs for its customers, Inomize needed a processor that supports fast time to market while meeting cost, power, and performance ...
  • Tensilica Vision P6 DSP Quadruples neural network and image processing performance
    YouTube Video
    Tensilica Vision P6 DSP Quadruples neural network and image processing performance
    Neil Robinson from the Cadence Tensilica business unit introduces the new Vision P6 DSP. This Digital Signal Processor builds upon the earlier Vision P5 DSP, ...
  • Tensilica Config Demo v2
    YouTube Video
    Tensilica Config Demo v2
    Quick demo of processor configuration by Tensilica CTO Chris Rowen.
  • Whiteboard Wednesdays - What's a Configurable Processor?
    YouTube Video
    Whiteboard Wednesdays - What's a Configurable Processor?
    In this week's Whiteboard Wednesdays video, Chris Rowen discusses the basics of Tensilica configurable processors and what is involved in using them.
  • Tensilica Instruction Extension Top  #5 Facts
    YouTube Video
    Tensilica Instruction Extension Top #5 Facts
  • Tensilica Founder Chris Rowen on EDA Industry Challenges
    YouTube Video
    Tensilica Founder Chris Rowen on EDA Industry Challenges
    Rowen sees Moore's Law causing increased engineering specialization for SoC designers, and opportunities for design automation and IP companies to benefit ...
  • The path to 100 billion chips - from instruction sets to CPUs - Phillip Burr - IP SoC 2017 Grenoble
    YouTube Video
    The path to 100 billion chips - from instruction sets to CPUs - Phillip Burr - IP SoC 2017 Grenoble
    "The path to 100 billion chips - from instruction sets to CPUs" by Phillip Burr, Director Product Management of Arm, is a keynote talk for IP SoC 2017 Grenoble, ...
  • VLAB Demo: Tensilica Xtensa Virtual Platform
    YouTube Video
    VLAB Demo: Tensilica Xtensa Virtual Platform
    VWorks presents a demonstration of VLAB, featuring a virtual platform for Tensilica Xtensa processors. See how virtual prototyping can accelerate your software ...
  • HC23-S4: DSP
    YouTube Video
    HC23-S4: DSP
    Session 4, Hot Chips 23 (2011), Thursday, August 18, 2011. The XMOS Arch and the XS1 Chips David May, XMOS The Worlds' Fastest DSP Core: Breaking the ...
  • Whiteboard Wednesdays – Extending a Processor’s Instruction Set
    YouTube Video
    Whiteboard Wednesdays – Extending a Processor’s Instruction Set
    In this week's Whiteboard Wednesdays video, Chris Rowen explains the benefits of extending a processor's instruction set to achieve higher performance and ...
  • Tensilica ships over 2 billion cores and counting
    YouTube Video
    Tensilica ships over 2 billion cores and counting
    Tensilica has shipped over 2 billion cores to date and that number is increasing rapidly as the rate of cores shipped also increases.
  • Mobile World Congress: Designing in Sensor Fusion Using Cadence Tensilica DSPs
    YouTube Video
    Mobile World Congress: Designing in Sensor Fusion Using Cadence Tensilica DSPs
    Kurt Weber, Director of Sales for Hillcrest Labs, demos a sensor fusion solution using Cadence Tensilica DSP technology at Mobile World Congress 2015 ...
  • CES 2015: Designing Facial-detection Systems with an Image/video DSP
    YouTube Video
    CES 2015: Designing Facial-detection Systems with an Image/video DSP
    At CES 2015, Gary Dick, Cadence engineering product manager, and Pulin Desai, Cadence product marketing director, showcases face detection using an ...
  • DSP Builder Advanced Blockset: Getting Started
    YouTube Video
    DSP Builder Advanced Blockset: Getting Started
    The DSP Builder for Intel® FPGAs is a collection of library blocks for the Mathworks MATLAB* Simulink* environment that allows you to generate ...
  • Cadence - Industry’s first standalone, self-contained NN DSP – Tensilica Vision C5
    YouTube Video
    Cadence - Industry’s first standalone, self-contained NN DSP – Tensilica Vision C5
  • Zilog August 14, 2018
    Zilog is a trusted supplier of application-specific embedded system-on-chip (SoC) solutions for the industrial and consumer markets. From its roots as an ...
  • Solutions August 14, 2018
    Cadence provides solutions that go beyond point tools, in areas like 3D-IC design, automotive electronics, low-power, advanced node applications, and more.
  • ESP32 - Wikipedia August 14, 2018
    ESP32シリーズは Wi-FiとBluetoothを内蔵する低コスト、低消費電力なSoCのマイクロコントローラである。 TensilicaのXtensa ...
  • Arteris IP - The Network-on-Chip (NoC) interconnect company August 12, 2018
    Arteris provides network-on-chip (NoC) communications semiconductor IP including FlexNoC and the new Ncore cache coherent interconnect IP for heterogeneous ...
  • ESP8266 - Wikipedia August 12, 2018
    In the table above (and the two tables which follow), "Active pins" include the GPIO and ADC pins with which you can attach external devices to the ESP8266 ...
  • Tensilica - Wikipedia August 11, 2018
    Tensilica was a company based in Silicon Valley in the semiconductor intellectual property core business. It is now a part of Cadence Design Systems.
  • NANO32 IoT Development Board - 4MB August 11, 2018
    NANO32 by Gravitech & MakerAsia *** ALL NANO32 order will be shipped directly from our manufacture in Thailand.*** NANO32 Features. 40MHz Crystal for CPU ...
  • ESP8266 WiFi Module, Luabby Smart Low Cost Low Power ... August 1, 2018
    Amazon.com: ESP8266 WiFi Module, Luabby Smart Low Cost Low Power Wireless IoT Module, Pack of 2 PCS,ESP8266-S1: Computers & Accessories
  • 杭州国芯科技股份有限公司-物联网AI芯片GX8010发布,万物智能时代呼之欲来! July 30, 2018
    物联网ai芯片gx8010发布,万物智能时代呼之欲来! 发布时间:2017-11-01
  • Installing GCC - GNU Project - Free Software Foundation (FSF) June 1, 2018
    CRIS. CRIS is the CPU architecture in Axis Communications ETRAX system-on-a-chip series. These are used in embedded applications. See “CRIS Options” in ...